Simulation and Hardware Implementation of Selective Harmonic Elimination in Multi Level Inverters

Multilevel inputs are capable of generating nearly sinusoidal waveform. The three level inverters use a source with two numbers of capacitors. The operating waveform contains three different levels. The five level inverters use a source with six numbers of capacitors. The operating waveform contains five different levels. The main objective of this paper is to compare the performance of diode clamped and capacitor clamped three level and five level inverters. The Diode Clamped Three level inverter, Capacitor Clamped Three level inverter and Diode Clamped Five level inverter, Capacitor Clamped Five level inverters was simulated using ORCAD and their performance based on total harmonic distortion and fundamental voltage magnitude is presented. This paper also projects a novel method of eliminating selective harmonics (most dominant) by switching angle calculation. The hardware implementation for Capacitor Clamped Five Level Inverter which was found to be the best among the investigated topologies was implemented using microcontroller 892051(An ATMEL family).The simulated waveforms was compared with the implementation waveforms.